The latest trend within electronic component packaging is to increase the number of functions performed by a single chip or by a combination of several chips in the same package. This means that in the future new components will perform the equivalent functions of existing components in a much more compact size, such components are known as systems-in-packages (SIPs). It is this major change to chip packaging design, resulting from the use of 3D CAD modeling, that is dramatically reducing component footprints with increasing power that is causing a change in the approach to previous decades for thermal modeling. Thermal designers will have to manage sophisticated 3D component packaging comprising several chips with various power densities, embedded in small volumes that will drive up the complexity of their cooling solutions.
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