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2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions

机译:2D分解系统级和RTL描述的顺序等效检查

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Symbolic simulation-based approach is viable for the sequential equivalence checking (SEC) of SLM-vs.-RTL. However, it can't avoid the storage explosion introduced by the explosion of the BDD sizes for large designs. For scalability, we introduce two kinds of decomposition techniques: One is the equivalence checking oriented program slicing; the other is the hierarchical insertion of logic cutpoints. And a 2D decomposition SEC method of SLM-vs.-RTL is presented. "2D decomposition" means decomposition in the space dimension and the time dimension. The verification model is only built for the program slices of a single output variable for each time, which limits the usage of memory. During checking the equivalence of the program slices, the logic cutpoints are inserted to split the verification model of the program slices in the time dimension, which controls the storage explosion further. The promising experimental results demonstrate the benefits brought by our 2D decomposition method.
机译:基于SLM-VS-RL的顺序等效检查(SEC)是可行的基于象征的基于仿真方法。但是,它无法避免通过BDD尺寸的爆炸来避免储存爆炸,用于大型设计。为了可扩展性,我们介绍了两种分解技术:一个是对取向的程序切片的等价性;另一个是逻辑切断点的分层插入。并且提出了SLM-VS-rt1的2D分解秒法。 “2D分解”表示空间尺寸和时间尺寸的分解。验证模型仅为每次为单个输出变量的程序切片构建,这限制了存储器的使用。在检查程序切片的等效期间,插入逻辑切片点以在时间尺寸中拆分程序切片的验证模型,从而进一步控制存储爆炸。有希望的实验结果表明了我们的2D分解方法带来的益处。

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