Multi-port Memory Design Methodology Based on Block Read and Write

摘要

Multi-port memory design methodology based on block read/write is proposed in this paper. This new multi-port memory is constructed using 1-port memory banks and features parallel read/write access with low port access rejection probability. In comparison with conventional implementation of multi-port memory based on 1-port memory banks, the number of necessary 1-port memory banks is greatly reduced. Moreover, the complexity of switching network and arbitration circuits are also simplified. A tri-port memory is designed using off-the-shelf memory chips. Experiment results show that this multi-port memory design methodology is correct and the implemented multi-port memory performs well.