Design and Implementation of DVB-S2 LDPC Encoder

摘要

In this paper, a DVB-S2 LDPC encoder based on FPGA is proposed after detailed analysis of DVB-S2 LDPC code on the basis of irregular repeat accumulate (IRA) coding algorithm. This method not only uses pipeline technique combined with all parallel structures to improve the coding efficiency, but also makes use of VHDL language to achieve DVB-S2 encoder, which meets the requirements of DVB-S2 standard on the condition of low hardware resources.