Electromigration analysis of peripheral ultra fine pitch C2 flip chip interconnection with solder capped Cu pillar bump

摘要

In this report, the electromigration behavior of 80μm pitch C2 (Chip Connection) interconnection is studied and discussed. C2 is a peripheral ultra fine pitch flip chip interconnection technique with Cu pillars and Sn/Ag capped solder bumps formed on Al pads for wirebonding. The technique was reported in ECTC 2009. It allows an easy control of the space between dies and substrates just by varying the Cu pillar height. The control of the collapse of the solder bumps is not necessary, hence the technology is called the “C2 (Chip Connection)”. C2 bumps are connected to OSP surface treated Cu substrate pads on an organic substrate by reflow and no-clean process. C2 is a low cost ultra fine pitch Flip Chip interconnection. However, the electromigration behavior for such a small flip chip interconnection is still an open issue. The electromigration tests were performed on 80μm pitch C2 flip chip interconnection. The interconnections with two different solder materials were tested: Sn/2.5Ag and pure Sn. The effect of Ni barrier layer on the test is also studied. The tests showed that the presence of IMC layers reduce the atomic migration of Cu. The test also showed that the Ni barrier is also effective in reducing the migration of Cu atoms into Sn solder. The under bump metals (UBMs) are formed by sputtered Ti/Cu layers. The electro-plated Cu pillar height is 45μm and the solder height is 25μm for 80μm pitch. The die size is 7.3 mm square and the organic substrate is 20 mm square with 4 layers laminated prepreg with 310μm thickness. Electromigration test condition is 7–10 kA/cm2 at 125–170°C. Intermetallic compounds (IMCs) were formed prior to the test by aging process which is 2,000 hr at 150°C and then the electromigration tests were performed. We have studied the effect of IMCs thickness on electro-migration induced failure mechanism in C2 flip chip interconnection on an orga--nic substrate.