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Exploiting criticality to reduce bottlenecks in distributed uniprocessors

机译:利用关键性来减少分布式单处理器中的瓶颈

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Composable multicore systems merge multiple independent cores for running sequential single-threaded workloads. The performance scalability of these systems, however, is limited due to partitioning overheads. This paper addresses two of the key performance scalability limitations of composable multicore systems. We present a critical path analysis revealing that communication needed for cross-core register value delivery and fetch stalls due to misspeculation are the two worst bottlenecks that prevent efficient scaling to a large number of fused cores. To alleviate these bottlenecks, this paper proposes a fully distributed framework to exploit criticality in these architectures at different granularities. A coordinator core exploits different types of block-level communication criticality information to fine-tune critical instructions at decode and register forward pipeline stages of their executing cores. The framework exploits the fetch criticality information at a coarser granularity by reissuing all instructions in the blocks previously fetched into the merged cores. This general framework reduces competing bottlenecks in a synergic manner and achieves scalable performance/power efficiency for sequential programs when running across a large number of cores.
机译:可组合的多核系统合并了多个独立的核,以运行顺序的单线程工作负载。但是,由于分区开销,这些系统的性能可伸缩性受到限制。本文介绍了可组合多核系统的两个关键性能可伸缩性限制。我们提出了一条关键路径分析,该分析揭示了跨核心寄存器值传递和由于错误推测而导致的停顿所需的通信是阻止有效扩展至大量融合内核的两个最严重的瓶颈。为了缓解这些瓶颈,本文提出了一个完全分布式的框架,以不同粒度利用这些体系结构中的关键性。协调器内核利用不同类型的块级通信关键性信息来在其执行内核的解码和注册前向流水线阶段微调关键指令。该框架通过在先前提取到合并核心中的块中重新发布所有指令,以更粗粒度利用提取关键信息。当在大量内核上运行时,该通用框架以协同方式减少了竞争瓶颈,并为顺序程序实现了可扩展的性能/电源效率。

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