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Incrementally distributing logical wires onto physical sockets by reducing critical path delay

机译:通过减少关键路径延迟,将逻辑线路逐步分配到物理套接字上

摘要

Configuring a hardware system includes providing a first data representative of a first assignment of a multitude of wires to a multitude of physical connections between a multitude of logic circuits of the hardware system, and transforming the first data into a second data representative of a second assignment of the multitude of wires to the multitude of physical connections. The transforming includes calculating a multitude of latencies each associated with a selected one of the multitude of wires, and assigning a first subset of the multitude of wires to at least one of the multitude of physical connections in accordance with a first improvement goal. The transforming causes the value of each one of the multitude of latencies that are associated with the first subset to be less than or equal to the first improvement goal, when the second data is used to configure the hardware system.
机译:配置硬件系统包括提供表示多个导线的第一分配的第一数据到硬件系统的多个逻辑电路之间的多个物理连接的第一数据,以及将第一数据转换成表示第二分配的第二数据众多导线与众多物理连接之间的关系。所述变换包括:计算多个时延,每个时延与所述多个导线中的所选择的一个相关联;以及根据第一改进目标,将所述多个导线的第一子集分配给所述多个物理连接中的至少一个。当第二数据用于配置硬件系统时,该转换导致与第一子集相关联的多个延迟中的每一个的值小于或等于第一改进目标。

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