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Register allocation for write activity minimization on non-volatile main memory

机译:寄存器分配,以减少非易失性主存储器上的写活动

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Non-volatile memories are good candidates for DRAM replacement as main memory in embedded systems and they have many desirable characteristics. Nevertheless, the disadvantages of non-volatile memory co-exist with its advantages. First, the lifetime of some of the non-volatile memories is limited by the number of erase operations. Second, read and write operations have asymmetric speed or power consumption in nonvolatile memory. This paper focuses on the embedded systems using non-volatile memory as main memory. We propose register allocation technique with re-computation to reduce the number of store instructions. When non-volatile memory is applied as the main memory, reducing store instructions will reduce write activities on non-volatile memory. With the proposed approach, the lifetime of non-volatile memory is extended accordingly. The experimental results demonstrate that the proposed technique can efficiently reduce the number of store instructions on systems with non-volatile memory by 25% on average.
机译:非易失性存储器非常适合作为嵌入式系统中的主存储器替换DRAM,并且它们具有许多理想的特性。然而,非易失性存储器的缺点与它的优点并存。首先,某些非易失性存储器的寿命受到擦除操作次数的限制。其次,读写操作在非易失性存储器中具有不对称的速度或功耗。本文重点介绍使用非易失性存储器作为主存储器的嵌入式系统。我们提出了具有重新计算功能的寄存器分配技术,以减少存储指令的数量。当将非易失性存储器用作主存储器时,减少存储指令将减少非易失性存储器上的写活动。利用所提出的方法,非易失性存储器的寿命相应地延长了。实验结果表明,所提出的技术可以有效地将具有非易失性存储器的系统上的存储指令数量平均减少25%。

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