A Design of HDB3 CODEC Based on FPGA

摘要

The basic principles and structure of HDB3 was briefly introduced in this paper, and the shortcomings of the existing HDB3 encoder and decoder was analyzed. Then a new design of HDB3 encoder and decoder based on FPGA was proposed, and the hardware design circuit and software simulation were introduced. The simulation was achieved through the VERILOG-HDL in EP2C35F672C8 chip of Cyclonell series in the development environment of Quartus II 7.2. The results show that the design meets the requirements of HDB3 encoder and decoder, which has a simple hardware circuit and flexible software, and runs fast,and can be used in practical communication systems.