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Advanced Junction Formation for Sub-32nm Logic Devices

机译:低于32nm逻辑器件的高级结形成

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This paper is meant to be a general overview of recent advances in new processes and process tooling (implant and anneal) for advanced junction formation. Also included are details of impact of novel implant processes, such as cold implant and pre-amorphization (PAI) implants on Nickel Silicide (NiSi) formation. We will also discuss subtle impacts of wafer temperature during ion implantation on channel stress retention and shallow junctions in today's advanced device nodes.
机译:本文旨在概述用于高级结形成的新工艺和工艺工具(植入和退火)的最新进展。还包括新颖的注入工艺(例如冷注入和预非晶化(PAI)注入)对硅化镍(NiSi)形成的影响的详细信息。我们还将讨论离子注入过程中晶片温度对通道应力保持力和当今先进器件节点中浅结的微妙影响。

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