This paper describes a novel area-efficient and full current-mode dual-port(DP) SRAM. It greatly reduced the area consumption of the DP-SRAM by using single-port(SP)-cell instead of 8T-DP-cell. Based on the full current-mode techniques for read/write operation, it also achieved low power consumption.A 1K x 8 proposed DP-SRAM is designed based on 0.18 μm CMOS technology. Its area is only 1.2 times of the SP-SRAM,and its power is 1.3 times of the SP-SRAM when the two ports simultaneously work at the same frequency of the SP-SRAM.
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机译：本文介绍了一种新型的区域有效的全电流模式双端口（DP）SRAM。通过使用单端口（SP）单元而不是8T-DP单元，极大地减少了DP-SRAM的面积消耗。基于全电流模式的读/写操作技术，它还实现了低功耗。基于0.18μmCMOS技术设计了1K x 8的DP-SRAM。当两个端口同时以SP-SRAM的相同频率工作时，其面积仅为SP-SRAM的1.2倍，功率为SP-SRAM的1.3倍。
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