DEVELOPMENT OF HIGH DENSITY PRINTED WIRING BOARD WITH FINE STACKED VIA HOLES

摘要

We have developed the next generation ALIVH (Any Layer Interstitial Via Holes) Substrate, ALIVH-FB (ALIVH for Fine Bare chip grade). The design rules of fine layers are as follows. L/S=25/25 μm, V/L=50/150 μm. ALIVH has stacked via holes anywhere in any layers, so it can contain much more wiring and designing process takes less time to complete. ALIVH-FB has the same structure as ALIVH. Via holes in ALIVH-FB can be made anywhere in any layers like ALIVH. Furthermore, in fine layers, it has smaller via holes and finer lines compared with ALIVH. As a result, wiring capability is improved greatly. ALIVH-FB is available for the substrate of high-pin-count semiconductor package. ALIVH-FB is realized by the technologies of fine line etching, transcriptional process, accurate alignment and interconnection with conductive paste. In this paper, we discuss these technologies and the properties of fine via holes in several structures. Thermal shock tests were carried out in atmospheric phase and liquid phase. The results of reliability evaluation about electrical connection through fine via holes turn out to be excellent at 200 μm via hole pitch.