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Electrical and Mechanical Performance of Quilt Packaging with Solder Paste by Pin Transfer

机译:用销钉用焊膏包装的电气和力学性能

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Electrical and mechanical performance of Quilt Packaging (QP), a 2D system-in-package chip-to-chip interconnection, is presented. QP employs contacts at the edges of integrated circuit dies along their vertical surfaces. Based on 3D HFSS simulations, the self-inductance of QP can be less than 0.01 nH, and the selfcapacitance can be less than 0.034 pF due to the shortness of the interconnection path. QP interconnection using solder paste with pin transfer is presented, and mechanical reliability is evaluated. A new pull test system specifically designed for QP is presented. The pull force that causes failure in a set of edge interconnects totaling 3 mm width of nodules is about 658 gram-force for Sn63Pb37 and 953 gram-force for SAC305.
机译:呈现了被子包装(QP)的电气和力学性能,提出了一个2D系统包装芯片到Chip互连。 QP采用沿其垂直表面的集成电路边缘的触点。基于3D HFSS模拟,QP的自电感可以小于0.01nh,并且由于互连路径的短路,自我加湿程度可以小于0.034pf。提出了使用具有引脚传输的焊膏的QP互连,并评估机械可靠性。提出了一种专为QP专为QP而设计的新型拉动测试系统。导致一组边缘互连的故障的拉力为3mm的结节宽度为SN63Pb37和SAC305的953克力为约658克力。

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