High Temperature Performance of Implanted-Gate n-Channel JFETs in 6H-SiC

摘要

Top-gate junction field-effect transistors are fabricated in n-type 6H silicon carbide epilayers by trench isolation and selective ion-implantation of N and Al. At room temperature, the output current shows good saturation and can be pinched-off to below 10 pA. A typical JFET with 20 #mu#m gate length exhibits a transconductance (G_(mo)) of 0.42 mS/mm and a drain saturation current (I_(DSSO)) of 1.2 mA/mm. Characteristics measured up to 400 deg C show excellent behavior with a 63percent reduction in g_(mo) and I_(DSSO), an on/off saturated drain current ratio of approx 10~6, and tolerable gate-to- substrate current leakage below threshold. Extracted electron mobility is 217 cm~2/V.s at RT and shows a T~(-2.17) power law dependence over this temperature range.