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A Non-Destructive Technique for High Field Characterization of Gate Insulators in SiC MOS Capacitors

机译:SiC MOS电容器中栅极绝缘子高场表征的非破坏性技术

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In this paper we report the use of a fast ramp response technique to non-destructively determine the dielectric breakdown strength of silicon-dioxide (SiO_2) gate insulators in SiC MOS capacitor structures. Conventional low voltage capacitance-voltage (C-V) techniques do not give information regarding the high field characteristics of the MOS structure, such as the breakdown strength of the oxide layer. Using the ramp response technique it is possible to determine the breakdown strength of the gate insulator or that of the semiconductor in a non-destructive manner that is not possible using classical C-V techniques. The breakdown strength of oxide layers deposited on SiC Lely substrates by a proprietary technique indicates a large variation, which could be due to variations in substrate surface condition, non-uniformities in the deposited oxide layer or the diffusion of impurities into the oxide from the highly doped substrates.
机译:在本文中,我们报告了使用快速斜坡响应技术来无损确定SiC MOS电容器结构中的二氧化硅(SiO_2)栅极绝缘子的绝缘击穿强度。常规的低压电容-电压(C-V)技术无法提供有关MOS结构的高场特性的信息,例如氧化物层的击穿强度。使用斜坡响应技术,可以以非破坏性的方式确定栅极绝缘体或半导体的击穿强度,这是传统C-V技术无法实现的。通过专有技术沉积在SiC Lely衬底上的氧化物层的击穿强度表明存在较大的变化,这可能是由于衬底表面状况的变化,沉积的氧化物层中的不均匀性或杂质从高度扩散到氧化物中的扩散掺杂的衬底。

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