Gated transmission line model structure for characterization of field- effect transistors

摘要

The gated Transmission Line Model (GTLM) structure is a novel characterization device and measurement tool for integrated circuit process monitoring. This test structure has Schottky gates between the ohmic contacts of a TLM pattern. The gate lengths are varied and the gate- to- ohmic separations are kept constant to provide an accurate determination of several important FET channel parameters. It offers a precise method for measuring the FET source resistance which requires no parameter fitting and which works equally well on planar, self-aligned gate, and recessed gate FET's. In addition, the GTLM structure offers the only available means to measure sheet resistance of enhancement-mode FET channels. The gated-TLM structure can also be used to find the effective free surface potential. The structure may be combined with capacitance- voltage analysis or geometric magnetoresistance analysis to create mobility and doping profile of actual FET channels. Further, the GTLM structure may be implemented in any existing semiconductor FET technology, including silicon, GaAs, and modulation-doped structures.