首页> 外文会议>International Conference on Communications;ICC'91 >DESIGN OF LEAKY BUCKET ACCESS CONTROL SCHEMES IN ATM NETWORKS
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DESIGN OF LEAKY BUCKET ACCESS CONTROL SCHEMES IN ATM NETWORKS

机译:ATM网络中的漏斗访问控制方案设计

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It is necessary that an ATM-based network be equipped with a congestion control mechanism to effectively and fairly allocate shared network resources such as transmission bandwidth and buffer capacity in a maiuler that provides satisfactory grade-of-service(GOS)for all network users with acceptable implementation costs.Traffic from users may need to be monitored and enforced to comply with traflic parameters that could be eshablished at the time of its admission to the ATM network.These parameters may include average and peak bit rates,and maximum burst Iengths.If the user does not conform to the parameters.actions must be taken for the violated traflic.The most common traffic enforcement method is the so-called"leaky bucket".Which is a simple open-loop control scheme,involving only local actions and no real-time coordination between network components.Depending on what enforcement action is taken and whether or nol there is a "shaping"buffer,four versions of the leaky bucket scheme are considered in this paper and their cell loss performance is compared in coniunction with a statistical multiplexer.Based on the best performing verslon,three architectures nave been proposed.Among mem.a novel algoritllm and its implementation method have been proposed to accommodate a large number of virtual channel connections on each incoming STS-3c channel.A VLSI chip(called a sequencer),containing aboul 200K CMOS transistors,has been designed to implement the architecture.
机译:有必要为基于ATM的网络配备拥塞控制机制,以有效和公平地分配共享网络资源(例如传输带宽和缓冲区容量),从而为所有网络用户提供令人满意的服务等级(GOS)。可接受的实施成本。可能需要监视和强制执行来自用户的流量,以使其符合在进入ATM网络时可以确定的流量参数。这些参数可能包括平均比特率和峰值比特率以及最大突发长度。用户不符合参数。必须对违反的流量采取措施。最常见的流量执行方法是所谓的“泄漏桶”。这是一种简单的开环控制方案,仅涉及本地操作,不涉及任何操作。网络组件之间的实时协调。根据采取的强制措施以及是否有“整形”缓冲区,泄漏桶方案的四个版本本文考虑了它们的性能,并与统计复用器进行了比较。在最佳性能的基础上,提出了三种体系结构。其中,提出了一种新颖的算法及其实现方法,可以容纳大量的算法。每个传入STS-3c通道上的虚拟通道连接的数量。已设计了一个包含大量200K CMOS晶体管的VLSI芯片(称为定序器)以实现该体系结构。

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