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Efficient Hardware Implementations for the Gaussian Normal Basis Multiplication Over GF(2163)

机译:GF(2163)上高斯正态基础乘法的高效硬件实现

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This article presents efficient hardware implementations for the gaussian normal basis multiplication over GF(2163). Hardware implementations of GF(2m) multiplication algorithms are suitable to design elliptic curve cryptoprocessors, which allow that elliptic curve based cryptosystems implemented in hardware provide more physical security and higher performance than software implementations. In this case, the multipliers were designed using conventional, modified and fast-parallel algorithms for the gaussian normal basis multiplication, the synthesis and simulation were carried out using Quartus II of Altera, and the designs were synthesized on the device EP2A15B724C7. The simulation results show that the multipliers designed present a very good performance using small area.
机译:本文介绍了在GF(2163)上进行高斯正则乘法的高效硬件实现。 GF(2m)乘法算法的硬件实现方式适合于设计椭圆曲线密码处理器,从而允许在硬件中实现的基于椭圆曲线的密码系统比软件实现方式提供更多的物理安全性和更高的性能。在这种情况下,乘法器是使用常规的,改进的和快速并行算法设计的,用于高斯法向基数乘法,使用Altera的Quartus II进行合成和仿真,并在设备EP2A15B724C7上进行了设计合成。仿真结果表明,所设计的乘法器在小面积情况下表现出非常好的性能。

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