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Efficient and low-complexity hardware architecture of Gaussian normal basis multiplication over GF(2m) for elliptic curve cryptosystems

机译:椭圆曲线密码系统在GF(2m)上进行高斯正则乘的高效且低复杂度的硬件架构

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摘要

In this paper, an efficient high-speed architecture of Gaussian normal basis (GNB) multiplierover binary finite field GF(2m) is presented. The structure is constructed by using some regular modules for computation of exponentiation by powers of 2 and low-cost blocks for multiplication by normal elements of the binary field. For the powers of 2 exponents, the modules are implemented by some simple cyclic shifts in the normal basis representation. As a result, the multiplier has a simple structure with a low critical path delay. The efficiency of the proposed multiplier is examined in terms of area and time complexity based on its implementation on Virtex-4 field programmable gate array family and also its application specific integrated circuit design in 180 nm complementary metal-oxide-semiconductor technology. Comparison results with other structures of the GNB multiplier verify that the proposed architecture has better performance in terms of speed and hardware utilisation.
机译:在本文中,提出了一种高效的高斯正态基数(GNB)乘以二进制有限域GF(2m)的高速体系结构。通过使用一些常规模块构造该结构,该常规模块用于计算2的幂的乘幂,而低成本块则用于与二进制字段的普通元素相乘。对于2个指数的幂,该模块通过在正常基数表示中进行一些简单的循环移位来实现。结果,乘法器具有简单的结构,具有低的关键路径延迟。基于在Virtex-4现场可编程门阵列系列上的实现以及在180 nm互补金属氧化物半导体技术中的专用集成电路设计,从面积和时间复杂度方面检验了提出的乘法器的效率。与GNB乘数的其他结构的比较结果验证了所提出的体系结构在速度和硬件利用率方面具有更好的性能。

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