The presented device structure offers novel features of recessed Interlevel Dielectric (ILD) into the active device trench and perpendicular N+ Body design. This allows for the device self alignment and unit size shrink to 1um and below without compromising gate and device switching ruggedness. Key parameter optimization achieved is the device on-resistance while ensuring robust avalanche energy capability. The additional device trade-off of trench depth and its implication of on-resistance vs. breakdown voltage is also being considered. The optimized for commercial application version of the proposed device structure has achieved 30V blocking voltage with 25V gate rating and the best in the class specific on-resistance (rsp) of l7mohm*mm2.
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