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Self-aligned High Density Low Voltage P-Channel Trench MOSFET with Ultra Low Resistance and Robust Ruggedness

机译:具有超低电阻和坚固的坚固性的自对准高密度低压P沟道MOSFET

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The presented device structure offers novel features of recessed Interlevel Dielectric (ILD) into the active device trench and perpendicular N+ Body design. This allows for the device self alignment and unit size shrink to 1μm and below without compromising gate and device switching ruggedness. Key parameter optimization achieved is the device on-resistance while ensuring robust avalanche energy capability. The additional device trade-off of trench depth and its implication of on-resistance vs. breakdown voltage is also being considered. The optimized for commercial application version of the proposed device structure has achieved 30V blocking voltage with 25V gate rating and the best in the class specific on-resistance (rsp) of 17mohm{sup}*mm{sup}2.
机译:所提出的装置结构提供嵌入式间隔电介质(ILD)的新功能,进入有源器件沟槽和垂直的N +车身设计。这允许器件自对准,并且单元尺寸在不折磨栅极和装置切换坚固性的情况下缩小到1μm和下方。符合关键参数优化是设备导通电阻,同时确保稳健的雪崩能力。还考虑了沟槽深度的附加设备权衡及其导通电阻与击穿电压的含义。对于所提出的设备结构的商业应用版本的优化已经实现了30V阻挡电压,具有25V栅极额定值,并且在17MOHM {SUP} * mm {sup} 2的类特定导通电阻(RSP)中最佳。

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