An effective method of characterization poly gate CD variation and its impact on product performance and yield

摘要

Poly gate CD variation has been increasingly affecting product performance and yield in advanced process technology. Here a BIST pattern based poly gate CD measurement (tilo) methodology is introduced in FPGA product. FPGA circuit is programmed into small local BIST pattern (tilo) and its delay is accurately reflecting local poly gate CD and variation. This methodology can conveniently capture poly gate CD statistical variation at both intra field and inter field level. The paper shows that this tilo measurement is very useful in guiding poly process debugging and yield improvement work.