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Design of VXIbus register based interface based on VHDL

机译:基于VHDL的基于VXIbus寄存器的接口设计

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The FPGA based VXI interface design technology is getting more and more mature as more and more VXI bus modular instruments are developed. This paper shows how to implement the VXI register based interface with VHDL. The initialization and self test circuits, device and register addressing circuits, reading and writing registers and data acknowledgement circuits are illustrated in detail. The simulation results combining with VXIbus timing sequence are also partly given.
机译:随着越来越多的VXI总线模块化仪器的开发,基于FPGA的VXI接口设计技术变得越来越成熟。本文展示了如何使用VHDL实现基于VXI寄存器的接口。详细说明了初始化和自测电路,设备和寄存器寻址电路,读写寄存器和数据确认电路。还部分给出了与VXIbus时序序列相结合的仿真结果。

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