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An architecture of Delta-Sigma A-to-D converters using a voltage controlled oscillator as a multi-bit quantizer

机译:使用压控振荡器作为多位量化器的Delta-Sigma A-D转换器的体系结构

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This paper proposes a new architecture for an oversampling Delta-Sigma Analog-to-Digital converter utilizing a voltage controlled oscillator (VCO), called a VCO DS A-to-D converter. The converter consists of a VCO, a counter, an analog integrator, and a feedback D-to-A converter. Through functional and circuit simulations, an SNR of over 50 dB was obtained at a 5 MHz signal bandwidth and 400 MHz sampling frequency using 0.6 /spl mu/m CMOS technology. This architecture is highly suitable for implementation with deep sub-/spl mu/m CMOS devices that can attain improved switching speeds and reduce power dissipation during low voltage operation. It provides wideband oversampling A-to-D converters for video and wireless signals and a low voltage system-on-a-chip solution for multi-media applications.
机译:本文提出了一种采用压控振荡器(VCO)的过采样Delta-Sigma模数转换器的新架构,称为VCO DS A-D转换器。该转换器由一个VCO,一个计数器,一个模拟积分器和一个反馈数模转换器组成。通过功能和电路仿真,使用0.6 / spl mu / m CMOS技术在5 MHz信号带宽和400 MHz采样频率下获得了超过50 dB的SNR。该架构非常适合采用深sub / splμ/ m CMOS器件来实现,该器件可以提高开关速度并降低低压操作期间的功耗。它为视频和无线信号提供宽带过采样模数转换器,以及为多媒体应用提供的低电压片上系统解决方案。

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