Optimised drain structures for improved hot carrier reliability in submicron NMOS transistors

摘要

Hot carrier effects present a major long term reliability hazard, particularly for submicron NMOS devices. In order to control hot carrier generation a variety of drain engineered structures, such as double diffused drains (DDDs) and lightly doped drains (LDDs) have been used. For the near submicron regime LDDs are typically used, whilst going to the deep submicron regime ( approximately 0.5 mu m) may require new structures such as buried LDDs (BLDDs). The authors consider some of the major factors in the design of hot carrier resistant devices for the near submicron and deep submicron regions. In addition to reducing hot carrier effects, they also demonstrate that LDD structures are essential for eliminating band to band tunneling, which may increase device leakage.