Advanced Memory Development Center, Semiconductor Company, Toshiba Corporation 800, Yamanoisshiki-cho, Yokkaichi, Mie-Pref, 512-8550, Japan;
Device Process Development Center, Corporate Research Development Center, Toshiba Corporation 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8583, Japan;
rnDevice Process Development Center, Corporate Research Development Center, Toshiba Corporation 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8583, Japan;
rnDevice Process Development Center, Corporate Research Development Center, Toshiba Corporation 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8583, Japan;
rnDevice Process Development Center, Corporate Research Development Center, Toshiba Corporation 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8583, Japan;
Device Process Development C;
spacer patterning process; mask defect printability; fail-bit-map analysis; acceptable mask defect size;
机译:用于22nm垫片自对准双图案的DUV检查和缺陷来源分析
机译:用光刻图案化的Ti掩模在MOCVD-GaN /蓝宝石衬底上的GaN HVPE生长过程中的自剥离过程分析
机译:动态顶空色谱和计算机辅助数据处理对牛奶中的微生物缺陷进行分类。2。人工神经网络,部分最小二乘回归分析和主成分回归分析
机译:通过使用失败位映射分析,掩模缺陷规范在间隔图案化过程中
机译:用于自然缺陷分析的极紫外光刻掩模版的局部掩模图案
机译:掩盖和注意力不集中任务之间的激活模式比较:隐式情绪面部处理的基于坐标的荟萃分析
机译:掩蔽与注意力不集中任务激活模式的比较:基于坐标的内隐情绪面部处理元meta分析
机译:运行规划过程的形式规范和状态空间分析