首页> 外文会议>International Conference on Solid-State and Integrated Circuit Technology(ICSICT-2006); 20061023-26; Shanghai(CN) >Investigation of Nanowire Orientation and embedded Si_(1-x).Ge_x Source/Drain Influence on Twin Silicon Nano-Wire Field Effect Transistor (TSNWFET)
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Investigation of Nanowire Orientation and embedded Si_(1-x).Ge_x Source/Drain Influence on Twin Silicon Nano-Wire Field Effect Transistor (TSNWFET)

机译:纳米线取向和嵌入式Si_(1-x).Ge_x源极/漏极对双硅纳米线场效应晶体管(TSNWFET)的影响的研究

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摘要

This paper describes TSNWFET devices with embedded Si_(1-x)Ge_x source/drain regions and different nanowire orientations. Thick Si_(1-x)Ge_x embedded source/drain and <110> channel orientation is found effective to enhance p-channel TSNWFET performance, while cause degradation for n-channel one. Thin Si_(1-x)Ge_x and <100> channel orientation is the preferred combination for keeping n-TSNWFET performance. With <110> channel orientation and thick Si_(1-x)Ge_x in source/drain, p-MOS current, for the first time, is even observed to exceed its n-type counterpart from the experiments.
机译:本文介绍了具有嵌入式Si_(1-x)Ge_x源/漏区和不同纳米线方向的TSNWFET器件。发现厚的Si_(1-x)Ge_x嵌入式源极/漏极和<110>沟道方向可有效增强p沟道TSNWFET性能,同时导致n沟道退化。薄的Si_(1-x)Ge_x和<100>沟道方向是保持n-TSNWFET性能的首选组合。在源极/漏极中具有<110>沟道方向和厚Si_(1-x)Ge_x的情况下,首次观察到p-MOS电流甚至超过了实验中的n型对应值。

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