【24h】

Low Power Microprocessor Design for Embedded Systems

机译:嵌入式系统的低功耗微处理器设计

获取原文
获取原文并翻译 | 示例

摘要

Continuing advances in VLSI technology render a billion-transistor SOC device inevitable in the near future. However, along with this opportunity the excessive amount of power that billions of transistors will consume will be the most important challenge to the design of the future chips. Many techniques have been developed in order to reduce the power consumption of microprocessors. Unfortunately, this often comes at the expense of performance. In this paper, we describe a number of techniques which are currently used when designing low power, high performance microprocessors. These include fabrication process, circuit technology, and microprocessor architecture. Since most techniques result in complex tradeoffs, we will show how decisions regarding the selection of a low power design approach require careful consideration.
机译:VLSI技术的不断发展使得在不久的将来不可避免地需要十亿晶体管的SOC器件。然而,伴随着这一机会,数十亿个晶体管将消耗的过多功率将是未来芯片设计的最重要挑战。为了减少微处理器的功耗,已经开发了许多技术。不幸的是,这通常是以性能为代价的。在本文中,我们描述了设计低功耗,高性能微处理器时当前使用的许多技术。这些包括制造工艺,电路技术和微处理器体系结构。由于大多数技术都会导致复杂的权衡,因此我们将说明如何谨慎选择低功耗设计方法的决策。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号