Electronic components used in high power applications must be able to deal with rough operating conditions, like frequent changes of temperature, mechanical stress and short-term electrical overload. An important factor in this context is the electronic packaging, especially the electrical interconnection between the die and the output pins. In order to evaluate the effects of thermo-mechanical stress on the electrical interconnections during the lifetime (which can be up to 25 years), a simulation using the finite-element method is the mainly used approach. Another possibility is to simulate stress cycles through applying an equivalent mechanical or electrical load with regards to the expected operating conditions. To evaluate the results of the stress simulation on the electrical interconnections, the chip package must be cut open and this implies mechanical stress. This paper presents a preliminary investigation for a non destructive evaluation of electrical interconnections in integrated circuits via magnetic imaging.
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