Low-Power Content Addressable Memory With Read/Write and Matched Mask Ports

摘要

A low-power content addressable memory (CAM) with read/write and mask match ports is proposed. The CAM cell is based on the conventional 6T cross-coupled inverters used for storing data with an addition of two NMOS transistors for reading out. In addition, the CAM has another four transistors for mask comparison operation through classical pre-charge operation. The readout port exploits a pre-charge reading mechanism in order to alleviate the drawback of power consumption generated from sensing amplifiers and all other related synchronization circuits which are structured in every column in the memory. Thus, the read and match features can have concurrent operations. An experimental CAM structure of storage size 64-bit x 128-bit is designed using 0.18-μm CMOS single poly and three layers of metals measuring a cell die area of 24.4375 μm~2 and a total silicon area of 0.269192 mm~2. The circuit works up to 200 MHz in simulation with total power consumption of 0.016 W at 1.8-V supply voltage.