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Modelling Framework for Parallel SiC Power MOSFETs Chips in Modules developed by Planar Technology

机译:平面技术开发的模块中并联SiC功率MOSFET芯片的建模框架

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This paper presents a modelling framework to simulate transients and steady state performance for SiC power MOSFETs modules. The electro-thermal modelling is implemented using Simscape/MATLAB program based on the single chip characteristics provided in the datasheet. The method can easily incorporate multiple chips and module parasitic components providing a tool for module characterization and to support module design optimization. The simulated model is then experimentally validated at different voltage buses and junction temperatures for a novel SiC MOSFET Module design consists of two parallel chips per switch developed using wire-bond free planar technology.
机译:本文提出了一个建模框架,用于仿真SiC功率MOSFET模块的瞬态和稳态性能。基于数据手册中提供的单芯片特性,使用Simscape / MATLAB程序可实现电热建模。该方法可以轻松地合并多个芯片和模块寄生组件,从而为模块表征和支持模块设计优化提供了工具。然后,针对新颖的SiC MOSFET模块设计,该仿真模型在不同的电压母线和结温下进行了实验验证,每个MOSFET组件采用无焊平面技术开发,每个开关包含两个并行芯片。

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