Technology Issues for Self-aligned Top-Gate Amorphous Metal Oxide Thin-Film Transistors

摘要

The key technology issues for fabrication of high performance self-aligned top gate amorphous metal oxide thinfilm transistors are addressed. These issues include the sputtering deposition of active layer of metal oxide, the PECVD growth of gate oxide, the plasma enabled interface treatment between the active layer and gate insulator, the doping method for low resistance source-drain regions, and the annealing process for performance enhancement. With these issues well addressed, high performance self-aligned top-gate TFTs with various amorphous oxide channel materials, like aIGZO, a-IZO and a-ZTO have been achieved.