Design Asynchronous Circuits for Soft Error Tolerance

摘要

This paper presents a quasi delay insensitive (QDI) asynchronous circuit design paradigm - modified Null Convention Logic (NCL), for high single event upset (SEU) tolerance. We investigate the behavior of the QDI circuit in the presence of SEUs, and propose a framework to evaluate the SEU sensitivity of the circuit. The modified NCL circuit can eliminate all SEUs in computational blocks if these SEUs occur when the computational blocks are in steady sates. Finally we present a case study of a two-bit adder.