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LOW DIELECTRIC CONSTANT MATERIAL DEPOSITED BY HDP-CVD FOR BARRIER AND ETCH STOP APPLICATION IN CU DAMASCENE STRUCTURE

机译:HDP-CVD沉积的低介电常数材料,用于铜大马士革结构中的阻挡层和蚀刻停止层

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摘要

A low dielectric constant barrier/etch stop material deposited by high density plasma CVD has been developed for use in copper damascene processes. The film is an amorphous silicon carbide material (a-Si,C:H), deposited using silane and methane as precursors. The film has a dielectric constant of ~3.8, a compressive stress of 1.0~1.5X10~9 dynes/cm~2, and leakage current density of 5X10~(-10) A/cm~2 at IMV/cm. HDP-CVD a-Si,C:H does not etch in ACT or EKC solutions. The film has been successfully integrated with fluorine-doped silicate glass (FSG) deposited using HDP-CVD for single and dual damascene structures. When integrated in-situ with HDP-FSG, an effective constant of 3.5 can be achieved.
机译:已经开发出通过高密度等离子体CVD沉积的低介电常数势垒/蚀刻停止材料,用于铜镶嵌工艺。该膜是非晶态碳化硅材料(a-Si,C:H),使用硅烷和甲烷作为前体沉积。该膜的介电常数为〜3.8,压应力为1.0〜1.5X10〜9达因/ cm〜2,在IMV / cm处的漏电流密度为5X10〜(-10)A / cm〜2。 HDP-CVD a-Si,C:H不会在ACT或EKC解决方案中蚀刻。该膜已成功与使用HDP-CVD沉积的掺氟硅酸盐玻璃(FSG)集成在一起,用于单镶嵌和双镶嵌结构。当与HDP-FSG原位集成时,可以实现3.5的有效常数。

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