Virtus, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798;
Virtus, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798;
Virtus, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798;
Virtus, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798;
Random access memory; Computer architecture; Microprocessors; Degradation; Stress; Circuit stability;
机译:具有片上动态可靠性管理和两阶段写入操作的28T FDSOI 8T SRAM
机译:具有扩展的写入/读取稳定性的差分数据感知功率上电(D $ ^ {2} $ AP)8T SRAM单元,适用于更低的VDDmin应用
机译:紧凑型低VDDmin 6T SRAM,采用双分裂控制辅助方案,提高了单元稳定性,读取速度和写入余量
机译:具有BTI感知稳定性监测器的8T SRAM和28纳米FDSOI的细胞稳定性改善的两相写入操作
机译:在16NM技术中使用FinFET和CMOS的8T SRAM单元的设计与性能评估
机译:在慢性中风幸存者中机器人平衡和核心稳定性训练之后的动态稳定性和躯干控制改善:试点研究
机译:使用FinFET和CMOS逻辑的双端口8T SRAM单元进行泄漏减少和增强的读写稳定性