DOE, Carleton Univ., Ottawa, ON;
decision feedback equalisers; intersymbol interference; telecommunication links; bit rate 10 Gbit/s; decision-feedback-equalizer; dispersion; frequency dependent loss; high-speed serial transmission link; highly-lossy backplane channel; highly-lossy band-limited channel; loss -20 dB; programmable precursor ISI equalization circuit; reflections; Backplane; ISI; SerDes; band-limited channel; decision-feedback equalizer (DFE); equalization; serial link; wireline transceiver;
机译:使用决策反馈均衡的背板应用的4.8-6.4-Gb / s串行链路
机译:可编程ASSP支持灵活的高速串行背板
机译:适用于高分散信道上高速接收器的低复杂度决策前馈均衡器架构
机译:用于高损耗背板通道上的高速串行链路的可编程前驱ISI均衡电路
机译:具有嵌入式通道均衡功能的模数转换,适用于高速串行链路接收器
机译:浅水PPM数字通信链路的盲分数间隔信道均衡
机译:用于高速串联回路的可编程预调谐器IsI均衡电路,用于高损耗背板通道