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Dept. of Electronics and Instrumentation Engg., Device Simulation Lab, Siksha ‘O’ Anusandhan University, Bhubaneswar, 751030, India;
Dept. of Electronics and Instrumentation Engg., Device Simulation Lab, Siksha ‘O’ Anusandhan University, Bhubaneswar, 751030, India;
Dept. of Electronics and Instrumentation Engg., Device Simulation Lab, Siksha ‘O’ Anusandhan University, Bhubaneswar, 751030, India;
Dept. of Electronics Telecommunication Engg, National Institute of Technology Raipur, Raipur, Chhattisgarh, 492010, India;
MOSFET; Logic gates; Integrated circuit modeling; Performance evaluation; Silicon-on-insulator; Nanoscale devices; Semiconductor device modeling;
机译:纳米级三门SOI MOSFET中自加热效应电热液面的影响
机译:使用计算机仿真研究新的改进的源极/漏极以减小纳米级MOSFET中的自热效应
机译:自上而下研究全栅硅纳米线MOSFET的自热效应
机译:纳米级沟槽阶梯式闸门MOSFET的研究探讨自热效果
机译:纳米级双栅极MOSFET射频无线通信集成电路的分析与设计
机译:具有位置载流子散射相关性的准弹道漏电流电荷和电容模型对纳米级对称DG MOSFET有效
机译:纳米级多栅极MOSFET针对RF和IC应用的性能指标研究
机译:具有空气/半导体反射镜的长波长垂直腔体激光器:用于硅mOsFET的纳米级栅极技术