首页> 外文会议>Conference on the Computation of Magnetic Fields(COMPUMAG 2003) vol.1; 20030713-17; Saratoga Springs,NY(US) >3D Capacitance Extraction of IC Interconnects Using Field Solvers and Homogenization Technique
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3D Capacitance Extraction of IC Interconnects Using Field Solvers and Homogenization Technique

机译:使用场求解器和均质化技术对IC互连进行3D电容提取

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摘要

In the extraction and simulation of IC chips using electromagnetic field solvers, one of the difficulties is the modeling of the multilayered dielectric structures. The consideration of these thin layers in the field solvers increases dramatically the memory and the computation time. This paper presents a numerical bomogeoization strategy of multilayered dielectric media that allows removing die dielectric layers from the field solver models. A technique that transforms the homogenized anisotropic material to an isotropic material is also developed. This homogenization strategy has been applied in both the finite element method and a fast multipole expansion accelerated boundary element method. A case of 3D critical net capacitance extraction of a real digital chip is given as an example.
机译:在使用电磁场求解器提取和仿真IC芯片时,困难之一是多层介电结构的建模。在现场求解器中考虑这些薄层会极大地增加内存和计算时间。本文提出了一种多层介电介质数值数值化的策略,该策略允许从场求解器模型中去除裸片介电层。还开发了将均质各向异性材料转变为各向同性材料的技术。这种均质化策略已应用于有限元方法和快速多极膨胀加速边界元方法中。以实际数字芯片的3D临界净电容提取为例。

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