首页> 外文会议>Conference on Advanced Characterization Techniques for Optics, Semiconductors, and Nanotechnologies; Aug 3-5, 2003; San Diego, California, USA >Manufacturability Considerations in Designing Optical Monitoring Methods for Control of Plasma Etch Processes
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Manufacturability Considerations in Designing Optical Monitoring Methods for Control of Plasma Etch Processes

机译:在设计用于控制等离子体蚀刻过程的光学监控方法时的可制造性考虑因素

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Robustness and reliability are among the most important requirements of semiconductor manufacturing processes. Their importance grows with the need to continuously improve yield and contribute to reduced cost of ownership. This necessitates including manufacturability considerations in the fundamental design of methods and instruments for in situ control of plasma etch processes. Optical monitoring methods and equipment for broadband (UV-VIS-IR) reflectometry have been developed to meet these advanced needs. The hardware is optimized for sufficiently accurate in situ metrology capabilities in a harsh plasma processing environment with minimal maintenance requirements. Novel model-based approaches are used to determine the absolute wafer state in real time. This facilitates compensating for incoming material variation with minimal reliance on operator input and interpretation. No special test structures on the wafer are required while the process chamber is only minimally modified for diagnostic equipment access. The methods facilitate development of fault detection schemes that help prevent misprocessing of wafers. Thus, demanding process control requirements are met on a wafer-to-wafer basis. The applicability of the technique has been successfully demonstrated for critical silicon-based etch applications such as shallow trench isolation (STI), recess for DRAM and embedded DRAM (eDRAM), and polysilicon gate.
机译:鲁棒性和可靠性是半导体制造过程中最重要的要求。随着不断提高产量并降低拥有成本的需求,它们的重要性日益增长。这需要将可制造性考虑因素包括在原位控制等离子体蚀刻工艺的方法和仪器的基本设计中。为了满足这些高级需求,已经开发了用于宽带(UV-VIS-IR)反射测量的光学监视方法和设备。硬件经过优化,可在苛刻的等离子处理环境中以最低的维护要求获得足够准确的原位计量能力。基于新颖的基于模型的方法可用于实时确定绝对晶圆状态。这有助于以最少的操作员输入和解释来补偿进料变化。晶片上不需要特殊的测试结构,而处理室仅需进行最小程度的修改即可进入诊断设备。该方法促进了故障检测方案的开发,该故障检测方案有助于防止晶片的误处理。因此,在晶片间的基础上满足了苛刻的过程控制要求。该技术的适用性已成功证明了用于关键的基于硅的蚀刻应用,例如浅沟槽隔离(STI),DRAM和嵌入式DRAM(eDRAM)的凹槽以及多晶硅栅极。

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