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Measuring and compensating for process mismatch-induced, reference spurs in phase-locked loops using a sub-sampled DSP

机译:使用子采样DSP测量和补偿锁相环中过程失配引起的参考杂散

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A DSP method based on sub-sampling followed by M-point FFT of the sub-sampled signal is used to reduce the phase-locked loop's reference spur. To validate the system's effectiveness a digital calibration loop in SIMULINK is designed. The results show that the reference spur can be improved by 22 dBc with a 1% residual current mismatch and a 1 nA net value of leakage current.
机译:使用一种基于子采样并随后对子采样信号进行M点FFT的DSP方法来减少锁相环的参考杂散。为了验证系统的有效性,设计了SIMULINK中的数字校准回路。结果表明,在杂散电流为1%且漏电流净值为1 nA的情况下,基准杂散可以提高22 dBc。

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