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Failure Analysis and Process Improvements to a Through Wafer Via Process

机译:晶圆直通工艺的故障分析和工艺改进

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摘要

GaAs devices in our factory employ through wafer via technology. Since the wafers are electrically tested prior to forming the via, construction must be robust. In an effort to reduce wafer costs, a die size reduction was required. During qualification and characterization of die shrink, the via process was investigated. The best method for testing the via is with a reliability test. A failure that was discovered in the via by the reliability test was a metal separation between the frontside and backside layers. This paper discusses the methods to eliminate metal separation in the via. The process improvements include optimized control of the GaAs etch; improved post-etch residue cleans and pre-metal deposition cleans; and increased thickness of the back side seed metal. Finally, new process controls and improved detection methods were used to verify via functionality. Our improved via passed all reliability tests.
机译:我们工厂中的GaAs器件采用晶圆通孔技术。由于在形成通孔之前对晶片进行了电测试,因此构造必须坚固。为了降低晶片成本,需要减小管芯尺寸。在对芯片收缩进行鉴定和表征期间,研究了通孔工艺。测试通孔的最佳方法是进行可靠性测试。可靠性测试在通孔中发现的故障是正面层和背面层之间的金属分离。本文讨论了消除通孔中金属分离的方法。工艺上的改进包括对GaAs蚀刻的优化控制;改进的蚀刻后残留物清洁和金属前沉积清洁;并增加了背面种子金属的厚度。最后,新的过程控制和改进的检测方法被用于通过功能进行验证。我们的改良通孔通过了所有可靠性测试。

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