The Realization of Uniform and Reliable Intrinsic Gettering in 200mm p- and p/p- Wafers for a Low Thermal Budget 0.18μm Advanced CMOS Logic Process

摘要

P- polished and P/P- epitaxial wafers with and without an MDZ~R (Magic Denuded Zone) heat-treatment have been processed through a low thermal budget 0.18μm advanced CMOS Logic process. Measurements at key stages in the process clearly demonstrate that very little precipitation (below detection limit) occurs in the standard P- or P/P-wafers. In contrast, very uniform precipitation with consistent BMD (bulk micro-defect) and PFZ (precipitate-free zones) are observed for wafers that received the prior MDZ~R heat-treatment. This was demonstrated by subjecting the wafers to an additional 16 hour 1000℃ anneal designed to grow precipitates to a size where they become detectable by the cleave and etch technique. In addition, nickel haze gettering tests clearly demonstrated that reliable gettering of nickel (up to 4x10~(16) cm~(-2)) could be obtained early in the device process for wafers which received the MDZ~R heat-treatment without the need for the additional 16 hour 1000℃ anneal. However, nickel haze was observed for standard P-polished and P/P- epitaxial wafers even at the end of the process indicating the complete lack of any intrinsic gettering.