FAST IMPLEMENTATION OF RC6 USING INTEL'S SSE2 INSTRUCTIONS

摘要

RC6 is a symmetric block cipher, designed by RSA laboratory to meet the requirements of the AES competition. As one of the five AES finalists, RC6 achieves good performance with a high level of security, and especially fit for parallel processing. SSE2 is a set of Intel's instruction extensions in the IA-32's SIMD programming model. It provides the ability to perform SIMD operations on 128-bit packed integers which greatly enhances throughput and is a natural fit for RC6. In this paper we presents implementation of RC6 to fully exploit the paralleled processing potential of SSE2 instructions. With specific optimization techniques, our implementation can encrypt two blocks parallelly and greatly enhances the overall performance.