Implementation of fast fourier transforms and discrete cosine transforms in FPGAs

摘要

Fast Fourier Transform (FFT) and Discrete Cosine Transform (DCT) processors are designed and implemented using a Xilinx Field Programmable Gate Array (FPGA) device XC 4010. This device allows a 16-point FFT/DCT processor implementation. To design the CLB-efficient FFT/DCT processor in FPGAs, a pipelined bit-serial architecture with bit-parallel input data format is employed. These processors operate with a 20 MHz bit-clock and 16-bit system word length, and compute an entire 16-point DFT/DCT transform for every 16-bit clock cycle.