Universal Test Structure and Characterization Method for Bias-Dependent Drift Series Resistance of HV MOSFETs

摘要

A simple, fast and accurate characterisation method dedicated to the evaluation of bias-dependent drift resistance of the HV MOS transistors is presented. The procedure relies on a novel test design structure that gives direct information about the impact of the drift zone on the overall HV MOSFET characteristics. Intrinsic (MOS channel) and extrinsic (including drift region) characteristics, obtained by adapted measurements, are used for parameter extraction and physical effects identification. For the first time the variation of the drift resistance from room temperature up to 150℃ is extracted. Very good performance when combining a BSIM3V3 low voltage model with a drift resistance quasi-empirical model is reported.