On-Line Analysis of Hardware Performance Events for Workload Characterization and Processor Frequency Scaling Decisions

摘要

Energy efficiency optimizations of computational resources continue to be of growing importance for both classical da-tacenter workloads as well as high performance computing environments. New hardware generations introduce more and more energy efficiency features, resulting in a power consumption variation by at least a factor of four between idle and full load. Even the power consumption of different full-load workloads can vary substantially, clearly showing that there is energy saving potential apart from the traditional "race to idle". In this paper we present a configurable CPU frequency governor that adapts processor frequencies based on performance counter measurements instead of processor load. We use the SPEC OMP benchmark suite to determine the potential of our approach and present governor configurations for two up-to-date x86_64 microarchitec-tures. Moreover we show that substantial follow-up work is required to assess further efficiency optimization potential in this field.