An Arithmetic and Logical Unit using Reversible Gates

摘要

This paper presents novel one bit arithmetic and logical unit (ALU) design using basic reversible gates. Two designs for both the arithmetic and the logical unit are proposed and one design for the control unit is also put forward. These designs are integrated together to give four complete ALU designs. Each of the proposed design has been implemented in Verilog HDL using Xilinx ISE Suite 14.1 software to verify its functionality. The proposed designs are compared based on quantum cost, garbage outputs and ancilla inputs with their existing counterparts. The simplicity and the reduced quantum cost of the proposed ALU designs, when compared to the existing ones, makes them ideal candidates to be used as modules in quantum computers. The proposed ALUs extend their applications to cryptography, machine learning and nanotechnology.