Department of Electrical Computer Engineering, Duke University, Durham, North Carolina, 27708, USA;
Department of Electrical Computer Engineering, Duke University, Durham, North Carolina, 27708, USA;
Department of Electrical Computer Engineering, Duke University, Durham, North Carolina, 27708, USA;
Logic gates; Stress; Degradation; Sensors; Semiconductor device measurement; Performance evaluation; CNTFETs;
机译:长期偏置应力下碳纳米管晶体管的电子稳定性
机译:喷墨打印碳纳米管网络场效应晶体管中偏置应力引起的不稳定性的通用模型
机译:钝化对碳纳米管薄膜晶体管栅极偏置应力不稳定性的影响
机译:碳纳米管晶体管对传感器影响的偏置应力稳定性
机译:在施加的偏压和栅极电压下,悬浮碳纳米管场效应晶体管中的拉曼光谱和电传输。
机译:碳纳米管场效应晶体管基化学和生物传感器
机译:栅极偏压和漏极偏压应力下聚合物薄膜晶体管的阈值电压不稳定性
机译:碳纳米管场效应晶体管中栅极偏压调制的建模