Dept. of Electronics Communication Engineering, Govt. Engineering College Bikaner, Rajasthan;
Dept. of Electronics Communication Engineering, Govt. Engineering College Bikaner, Rajasthan;
Dept. of Electronics Engineering, Govt. Polytechnic College, Chittorgarh, Rajasthan;
Dept. of Electronics Communication Engineering, Govt. Engineering College Bikaner, Rajasthan;
Ciphers; Encryption; Registers; Pipeline processing; Field programmable gate arrays; Throughput;
机译:利用FPGA实现对轻量级HIGHT分组密码设计进行建模和优化
机译:FPGA实现增强的混沌 - kasumi块密码
机译:CSL:针对功耗受限设备的轻量级分组密码的FPGA实现
机译:FPGA设计与实现优化的RC5块密码
机译:具有并发错误检测功能的分组密码的紧凑硬件实现
机译:SIMON轻量级块密码的FPGA建模和优化
机译:设计策略和修改后的描述以优化密码FPGA实施:DES和Triple-DES的快速紧凑结果