Dept. of Electron. Sci., Univ. of Delhi, New Delhi, India;
MOSFET; electric fields; ferroelectric transitions; semiconductor device models; surface potential; DGFJL transistor; Landau's theory; double gate ferroelectric junctionless transistor; electric field; ferroelectric layer; gate control; low power switching applications; low voltage switching applications; negative capacitance effect; parabolic potential approximation; step-up conversion capability; surface potential; Analytical models; Doping; Logic gates; Metals; Mobile communication;
机译:新型双栅极铁电无结晶体管的建模与仿真研究
机译:基于仿真的负电容双栅无结铁电栅极电介质的研究
机译:无结双栅极晶体管的阈值电压变异性分析和建模
机译:双栅铁电连接(DGFJL)晶体管的建模与分析
机译:双门单电子晶体管:逻辑架构的建模,设计和评估。
机译:AFM纳米光刻制造的p型双栅极和单栅极无结累积晶体管的电性能比较和电荷传输
机译:双栅极连接隧洞场效应晶体管性能分析:RF稳定性视角